Data Sheet
READ VOLTAGE AND/OR CURRENT DATA BYTES
Depending on how the device is configured, the ADM1177
can be set up to provide information in three ways: voltage
ADM1177
For cases where the master is reading voltage only or current
only, only two data bytes are read and Step 7 and Step 8 are not
required.
and current readback, voltage only readback, and current
1
2
3
4
5
6
7
8
9 10
S ADDRESS R A DATA 1 A DATA 2 A DATA 3 N P
only readback. See the Write Command Byte section for
more details.
Voltage and Current Readback
The ADM1177 digitizes both voltage and current. Three bytes
SLAVE
Figure 40. Three-Byte Read from ADM1177
are read back in the format shown in Table 12.
Table 12. Voltage and Current Readback Format
1
S
2
SLAVE
ADDRESS
3
R A
4
DATA 1
5
A
6
DATA 2
7 8
N P
Byte
1
2
3
Contents
Voltage
MSBs
Current
MSBs
LSBs
B7
V11
I11
V3
B6
V10
I10
V2
B5
V9
I9
V1
B4
V8
I8
V0
B3
V7
I7
I3
B2
V6
I6
I2
B1
V5
I5
I1
B0
V4
I4
I0
Figure 41. Two-Byte Read from ADM1177
Converting ADC Codes to Voltage and Current Readings
The following equations can be used to convert ADC codes
representing voltage and current from the ADM1177 12-bit
ADC into actual voltage and current values.
Voltage Readback
The ADM1177 digitizes voltage only. Two bytes are read back in
the format shown in Table 13.
Tabl e 13. Voltage Only Readback Format
Byte Contents B7 B6 B5 B4 B3 B2 B1 B0
1 Voltage MSBs V11 V10 V9 V8 V7 V6 V5 V4
2 Voltage LSBs V3 V2 V1 V0 0 0 0 0
Current Readback
The ADM1177 digitizes current only. Two bytes are read back
in the format shown in Table 14.
Voltage = ( V FULLSCALE /4096) × Code
where:
V FULLSCALE = 6.65 V (7:2 range) or 26.35 V (14:1 range).
Code is the ADC voltage code read from the device
(Bit V11 to Bit V0).
Current = (( I FULLSCALE /4096) × Code )/ Sense Resistor
where:
I FULLSCALE = 105.84 mV.
Code is the ADC current code read from the device
(Bit I11 to Bit I0).
Read Status Register
(10)
(11)
Tabl e 14. Current Only Readback Format
Byte Contents B7 B6 B5 B4 B3 B2
1 Current MSBs I11 I10 I9 I8 I7 I6
2 Current LSBs I3 I2 I1 I0 0 0
B1
I5
0
B0
I4
0
A single register of status data can also be read from the
ADM1177 as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
read bit (high).
The following series of events occurs when the master receives
three bytes (voltage and current data) from the slave device:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address, followed by the
3.
4.
5.
The addressed slave device asserts an acknowledge on
SDA.
The master receives the status byte.
The master asserts an acknowledge on SDA.
read bit (high).
1
2
3
4
5
S ADDRESS R A
3.
The addressed slave device asserts an acknowledge
on SDA.
SLAVE
STATUS
BYTE
A
4.
5.
6.
7.
8.
9.
The master receives the first data byte.
The master asserts an acknowledge on SDA.
The master receives the second data byte.
The master asserts an acknowledge on SDA.
The master receives the third data byte.
The master asserts a no acknowledge on SDA.
Figure 42. Status Read from ADM1177
Table 15 shows the ADM1177 STATUS registers in detail. Note
that Bit 1, Bit 3, and Bit 5 are cleared by writing to Bit 4 (the
CLEAR bit) of the ALERT_EN register
10. The master asserts a stop condition on SDA, and the
transaction ends.
Rev. C | Page 19 of 24
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